Programmable Asynchronous Pipeline Arrays

Analysis Prediction Template Toolkit Aptt for Real Time Image Processing

Image processing applications often must not only provide accurate results but also meet real time exigencies This suggests a sensible division of labour since in practice algorithmic designers are rmly wedded to workstations or PCs Real time acceleration in machine vision can be pro vided either by specialist hardware such as eld programmable gate arrays FPGAs or by parallel processing neither...

Implementation of Asynchronous pipeline Using Verilog HDL

The asynchronous paradigm has interesting features due to the lack of the clock signal and it is another option for the project of digital systems. This paradigm has several design styles, where the micropipeline style is the most suitable one for FPGA platforms, due to the simplicity of its control. In this paper, we propose a pipeline architecture to implement asynchronous digital systems, in...

Programmable Asyn hronous Pipeline Arrays

Asynchronous Architecture

Field programmable gate arrays (FPGAs) are of increasing importance as processor support devices, and as computational devices in their only right. Current synchronous FPGA architectures create problems for the implementation of asynchronous circuits, due to their creation of hazards, reordering of signals and lack of arbitration. The paper examines how the first generation of asynchronous FPGA...

A clocking technique for FPGA pipelined designs

This paper presents a clocking pipeline technique referred to as a single-pulse pipeline (PP-Pipeline) and applies it to the problem of mapping pipelined circuits to a Field Programmable Gate Array (FPGA). A PP-pipeline replicates the operation of asynchronous micropipelined control mechanisms using synchronous-orientated logic resources commonly found in FPGA devices. Consequently, circuits wi...